IS45S16400E-7TLA2

容量 64M
規格 4Mx16
電壓 3.3V
類型 SDR
刷新 4K
速度 7 = 143MHz
狀態 Contact ISSI
評注
腳位數 TSOP2(54)
温度等级 A2 = Automotive Grade (-40°C to +105°C)
焊料類型 L = 100% matte Sn
Generation E = E
字數 400 = 4M
工作電壓範圍 S = 3.3V SDR
總線寬度 16 = x16
腳位/封裝 T = TSOP
產品系列 45 = SDR Automotive grade

IS45S16400E-7TLA2 特徵

  • Clock frequency: 166, 143 MHz
  • Fully synchronous; all signals referenced to a positive clock edge
  • Internal bank for hiding row access/precharge
  • Single 3.3V power supply
  • LVTTL interface
  • Programmable burst length
    • (1, 2, 4, 8, full page)
  • Programmable burst sequence: Sequential/Interleave
  • Self refresh modes
  • 4096 refresh cycles every 16ms (A2 grade) or 64ms (A1 grade)
  • Random column address every clock cycle
  • Programmable CAS latency (2, 3 clocks)
  • Burst read/write and burst read/single write operations capability
  • Burst termination by burst stop and precharge command
  • Byte controlled by LDQM and UDQM
  • Package: 400-mil 54-pin TSOP II
  • Lead-free package is available

概觀

ISSI's 64Mb Synchronous DRAM IS45S16400E is organized as 1,048,576 bits x 16-bit x 4-bank for improved performance. The synchronous DRAMs achieve high-speed data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input.

 

相關IC编號

IC 編號 庫存數量 可用數量 IC 編號 庫存數量 可用數量
IS45S16400E-7TLA2-TR 1,500 IS45S16400E-6TLA1-TR 1,500
IS45S16400E IS45S16400E-7TLA1 30,800 77
IS45S16400E-6TLA1 108 IS45S16400E-7TLA1-TR 1,500