IS45S16400E-7TLA2

Density 64M
Org 4Mx16
Vcc 3.3V
Type SDR
Refresh 4K
Speed 7 = 143MHz
Status Contact ISSI
Comment
Pkg Pins TSOP2(54)
Temp. Grade A2 = Automotive Grade (-40°C to +105°C)
Solder Type L = 100% matte Sn
Generation E = E
Number Of Words 400 = 4M
Operating Voltage Range S = 3.3V SDR
Bus Width 16 = x16
Package Type T = TSOP
Product Family 45 = SDR Automotive grade

IS45S16400E-7TLA2 Features

  • Clock frequency: 166, 143 MHz
  • Fully synchronous; all signals referenced to a positive clock edge
  • Internal bank for hiding row access/precharge
  • Single 3.3V power supply
  • LVTTL interface
  • Programmable burst length
    • (1, 2, 4, 8, full page)
  • Programmable burst sequence: Sequential/Interleave
  • Self refresh modes
  • 4096 refresh cycles every 16ms (A2 grade) or 64ms (A1 grade)
  • Random column address every clock cycle
  • Programmable CAS latency (2, 3 clocks)
  • Burst read/write and burst read/single write operations capability
  • Burst termination by burst stop and precharge command
  • Byte controlled by LDQM and UDQM
  • Package: 400-mil 54-pin TSOP II
  • Lead-free package is available

Overview

ISSI's 64Mb Synchronous DRAM IS45S16400E is organized as 1,048,576 bits x 16-bit x 4-bank for improved performance. The synchronous DRAMs achieve high-speed data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input.

 

Related Part Number(s)

Description Stock Qty Available Qty Description Stock Qty Available Qty
IS45S16400E-7TLA2-TR 1,500 IS45S16400E-6TLA1-TR 1,500
IS45S16400E IS45S16400E-7TLA1 30,800 77
IS45S16400E-6TLA1 108 IS45S16400E-7TLA1-TR 1,500