| 容量 | 512M |
|---|---|
| 規格 | 16Mx32 |
| 類型 | MSDR |
| 電壓 | 2.5/3.3V |
| 刷新 | 8K |
| 速度（MHz） | 133 |
| 腳位/封裝 | BGA(90) |
| 狀態 | EOL |
| 產品系列 | 42 = 商業/工業級SDRAM |
| 總線寬度 | 32 = x32 |
| 字數 | 160 = 16M |
| 代/版本 | C |
| 焊接 | L = SnAgCu |
| 温規 | [空白] = 商規 (0C to +70°C) |
| 外包裝 | 卷轴包 |
IS42RM32160C-75BL-TR 特徵
- Fully synchronous; all signals referenced to a positive clock edge
- Internal bank for hiding row access and pre- charge
- Programmable CAS latency: 2, 3
- Programmable Burst Length: 1, 2, 4, 8, and Full Page
- Programmable Burst Sequence:
- Sequential and Interleave
- Auto Refresh (CBR)
- TCSR (Temperature Compensated Self Refresh)
- PASR (Partial Arrays Self Refresh): 1/16, 1/8, 1/4, 1/2, and Full
- Deep Power Down Mode (DPD)
- Driver Strength Control (DS): 1/4, 1/2, and Full OPTIONS:
- Configuration: 16Mx32
- Power Supply: IS42SMxxx - Vdd/Vddq = 3.3V IS42RMxxx - Vdd/Vddq = 2.5V
- Package: 90 Ball BGA (8x13mm)
- Temperature Range: Commercial (0oC to +70oC) Industrial (-40oC to +85oC)
概觀
: ISSI's IS42SM/RM32160C is a 512Mb Mobile Syn- chronous DRAM configured as a quad 4M x32 DRAM. It achieves high-speed data transfer using a pipeline architecture with a synchronous interface. All inputs and outputs signals are registered on the rising edge of the clock input, CLK. The 512Mb SDRAM is internally con- figured by stacking two 256Mb, 16Mx16 devices. Each of the 4M x32 banks is organized as 8192 rows by 512 columns by 32 bits.