容量 | 256Mb |
---|---|
電壓 | 2.7V-3.6V |
類型 | HyperFlash™ |
狀態 | Prod |
評注 | |
频率 | 100 Mhz |
溫度範圍 | -40 to 125 deg °C |
腳位類型 | 24-Ball BGA (6x8mm) |
產品系列 | 26 = HyperFlash |
包裝代碼 | B = BGA 6x8mm, 1.0mm pitch (24 VF-BGA) |
Device Technology | S = 65nm, MirrorBit Process technology |
電壓 - 電源 | KL = 3.0V |
速度等級 | DA = 100MHz |
ROHS版 | L = true |
外包裝 | = TRAY |
溫度範圍 | I = Industrial (-40°C to +85°C) |
Model Number | 03 = DCARS, FBGA 24-ball, 1.0mm height |
密度配置 | 256 = 256M |
The ISSI HyperFlash family of products are high-speed CMOS, MirrorBitNOR flash devices with the HyperBus low signal count DDR (Double Data Rate) interface, that achieves high speed read throughput. The DDR protocol transfers two data bytes per clock cycle on the data (DQ) signals. A read or write access for the HyperFlash consists of a series of 16-bit wide, one clock cycle data transfers at the internal HyperFlash core and two corresponding 8-bit wide, one-half-clock-cycle data transfers on the DQ signals. Both data and command/address information are transferred in DDR fashion over the 8-bit data bus. The clock input signals are used for signal capture by the HyperFlash device when receiving command/address/data information on the DQ signals. The Read Data Strobe (RWDS) is an output from the HyperFlash device that indicates when data is being transferred from the memory to the host. RWDS is referenced to the rising and falling edges of CK during the data transfer portion of read operations. Command/address/write-data values are center aligned with the clock edges and read-data values are edge aligned with the transitions of RWDS. Read and write operations to the HyperFlash device are burst oriented. Read transactions can be specified to use either a wrapped or linear burst. During wrapped operation, accesses start at a selected location and continue for a configured number of locations in a group wrap sequence. During linear operation accesses start at a selected location and continue in a sequential manner until the read operation is terminated, when CS# returns High. Write transactions transfer one or more16-bit values.