1. 矽成
  2. 靜態隨機存取存儲器
  3. 同步 SRAM
  4. No-Wait(ZBT)
  5. 2.5V
  6. BGA(119), QFP(100), BGA(165)
  7. IS61NVF12836A-7-TR

  IS61NVF12836A-7-TR

數據表
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規格 128Kx36
腳位/封裝 BGA(119), QFP(100), BGA(165)
tKQ 6.5, 7.5
電壓 2.5V
VccQ 2.5V
型號別 IBIS
狀態 Prod
評注 F
外包裝 Tape on reel
速度（MHz） 177, 133
數據表
索取報價

IS61NVF12836A-7-TR 特徵

  • 100 percent bus utilization
  • No wait cycles between Read and Write
  • Internal self-timed write cycle
  • Individual Byte Write Control
  • Single Read/Write control pin
  • Clock controlled, registered address, data and control
  • Interleaved or linear burst sequence control us- ing MODE input
  • Three chip enables for simple depth expansion and address pipelining
  • Power Down mode
  • Common data inputs and data outputs
  • CKE pin to enable clock and suspend operation
  • JEDEC 100-pin TQFP, 119-ball PBGA, and 165- ball PBGA packages
  • Power supply: NVF: Vdd 2.5V (± 5%), Vddq 2.5V (± 5%) NLF: Vdd 3.3V (± 5%), Vddq 3.3V/2.5V (± 5%)
  • Industrial temperature available