IS61LPD51236A-200B3-TR - 日耀电子 | ISSI/蕊成授权代理

規格	512Kx36
腳位/封裝	BGA
tKQ	2.6, 3.1
電壓	3.3V
VccQ	2.5/3.3V
型號別	IBIS, BSDL
焊接	SnPb
狀態	Prod
評注	P/DCD
外包裝	Tape on reel
速度（MHz）	200
温規	Commercial Grade (0C to +70°C)
產品系列	High Speed

數據表

索取報價

IS61LPD51236A-200B3-TR 特徵

Internal self-timed write cycle
Individual Byte Write Control and Global Write
Clock controlled, registered address, data and control
Burst sequence control using MODE input
Three chip enable option for simple depth ex- pansion and address pipelining
Common data inputs and data outputs
Auto Power-down during deselect
Double cycle deselect
Snooze MODE for reduced-power standby
JTAG Boundary Scan for PBGA package
Power Supply LPD: Vdd 3.3V + 5%, Vddq 3.3V/2.5V + 5% VPD: Vdd 2.5V + 5%, Vddq 2.5V + 5%
JEDEC 100-Pin TQFP and 165-pin PBGA package

概觀

The ISSI IS61LPD/VPD51236A and IS61LPD/VP- D102418A are high-speed, low-power synchronous static RAMs designed to provide burstable, high-performance memory for communication and networking applications. The IS61LPD/VPD51236A is organized as 524,288 words by 36 bits, and the IS61LPD/VPD102418A is organized as 1,048,576 words by 18 bits. Fabricated with ISSI's advanced CMOS technology, the device integrates a 2-bit burst counter, high-speed SRAM core, and high- drive capability outputs into a single monolithic circuit. All synchronous inputs pass through registers controlled by a positive-edge-triggered single clock input.