| 容量 | 9M |
|---|---|
| 規格 | 512Kx18 |
| 電壓 | 3.3V |
| VccQ | 2.5/3.3V |
| 狀態 | Prod |
| tKQ(ns) | 2.6, 3.1 |
| 腳位數 | BGA(119), QFP(100), BGA(165) |
| 速度Mhz | 250, 200 |
| 評論上一版本 | P/DCD |
The ISSI IS61LPD/VPD25636A and IS61LPD/VP- , Internal self-timed write cycle D51218A are high-speed, low-power synchronous static , Individual Byte Write Control and Global Write RAMs designed to provide burstable, high-performance memory for communication and networking applications. , Clock controlled, registered address, data and The IS61LPD/VPD25636A is organized as 262,144 words by 36 bits, and the IS61LPD/VPD51218A is organized as 524,288 words by 18 bits. Fabricated with ISSI's advanced CMOS technology, the device integrates a 2-bit burst counter, high-speed SRAM core, and high-drive capability outputs into a single monolithic circuit. All synchronous inputs pass through registers controlled by a positive- edge-triggered single clock input.