IS45S32800D-7TLA2-TR

容量 256M
規格 8Mx32
電壓 3.3V
類型 SDR
刷新 4K
速度 7 = 143MHz
狀態 Contact ISSI
評注
腳位數 TSOP2(86), BGA(90)
温度等级 A2 = Automotive Grade (-40°C to +105°C)
焊料類型 L = 100% matte Sn
Generation D = D
字數 800 = 8M
工作電壓範圍 S = 3.3V SDR
總線寬度 32 = x32
腳位/封裝 T = TSOP
產品系列 45 = SDR Automotive grade
外包裝 Tape on Reel

IS45S32800D-7TLA2-TR 特徵

  • Clock frequency: 166, 143 MHz
  • Fully synchronous; all signals referenced to a positive clock edge
  • Internal bank for hiding row access/precharge
  • Single Power supply: 3.3V + 0.3V
  • LVTTL interface
  • Programmable burst length
    • (1, 2, 4, 8, full page)
  • Programmable burst sequence: Sequential/Interleave
  • Auto Refresh (CBR)
  • Self Refresh
  • 4096 refresh cycles every 16ms (A2 grade) or 64 ms (Commercial, Industrial, A1 grade)
  • Random column address every clock cycle
  • Programmable CAS latency (2, 3 clocks)
  • Burst read/write and burst read/single write operations capability
  • Burst termination by burst stop and precharge command OPTIONS
  • Package: 86-pin TSOP-II 90-ball TF-BGA

概觀

ISSI's 256Mb Synchronous DRAM achieves high-speed data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input. The 256Mb SDRAM is organized in 2Meg x 32 bit x 4 Banks.

 

相關IC编號

IC 編號 庫存數量 可用數量 IC 編號 庫存數量 可用數量
IS45S32800D-7TLA2 87 IS45S32800D-7BA1-TR 2,500
IS45S32800D IS45S32800D-7BLA1 6,486
IS45S32800D-6BLA1 6,625 IS45S32800D-7BLA1-TR 5,000
IS45S32800D-6BLA1-TR 5,000 IS45S32800D-7BLA2 570
IS45S32800D-6TLA1 6,364 IS45S32800D-7BLA2-TR 2,500
IS45S32800D-6TLA1-TR 5,000 IS45S32800D-7TLA1 3,913
IS45S32800D-7BA1 144 IS45S32800D-7TLA1-TR 6,739