IS45S16800J-7BLA2

規格	16Mx8
腳位/封裝	TSOP2(54)
電壓	3.3V
刷新	4K
速度	7 = 143MHz
字數	8M
焊接	SnAgCu
狀態	S=Q3/17
類型	SDR
總線寬度	16 = x16
温規	Automotive Grade (-40C to +105°C)
代/版本	J
產品系列	45 = SDR Automotive grade
温度等级	A2 = Automotive Grade (-40°C to +105°C)
焊料類型	L = SnAgCu
字數	800 = 8M
Generation	J = J
工作電壓範圍	S = 3.3V SDR
腳位/封裝	B = BGA

數據表

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IS45S16800J-7BLA2 特徵

Clock frequency: 166, 143 MHz
Internal bank for hiding row access/precharge
Power supply IS42/45S81600J IS42/45S16800J Vdd Vddq 3.3V 3.3V 3.3V 3.3V
LVTTL interface
Programmable burst length
- (1, 2, 4, 8, full page)
Programmable burst sequence: Sequential/Interleave
Auto Refresh (CBR)
Self Refresh
4096 refresh cycles every 16 ms (A2 grade) or 64 ms (Commercial, Industrial, A1 grade)
Random column address every clock cycle
Programmable CAS latency (2, 3 clocks)
Burst read/write and burst read/single write operations capability
Burst termination by burst stop and precharge command

概觀

ISSI's 128Mb Synchronous DRAM achieves high-speed data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input. The 128Mb SDRAM is organized as follows.