規格 2Mx32
類型 SDR
電壓 3.3V
刷新 4K
速度 5 = up to 200Mhz
腳位/封裝 T = TSOP
狀態 EOL
型號別 IBIS-TSOP, IBIS-BGA
產品系列 42 = 商業/工業級SDRAM
總線寬度 32 = x32
字數 200 = 2M
代/版本 E
焊接 L = 100% matte Sn
温規 [空白] = 商規 (0C to +70°C)
外包裝 卷轴包

IS42S32200E-5TL-TR 特徵

  • Clock frequency: 200, 166, 143, 133 MHz
  • Fully synchronous; all signals referenced to a positive clock edge
  • Internal bank for hiding row access/precharge
  • Single 3.3V power supply
  • LVTTL interface
  • Programmable burst length: (1, 2, 4, 8, full page)
  • Programmable burst sequence: Sequential/Interleave
  • Self refresh modes
  • 4096 refresh cycles every 16ms (A2 grade) or 64ms (Commercia, Industrial, A1 grade)
  • Random column address every clock cycle
  • Programmable CAS latency (2, 3 clocks)
  • Burst read/write and burst read/single write operations capability
  • Burst termination by burst stop and precharge command OPTIONS
  • Packages: 86-pin TSOP-II 90-ball TF-BGA

概觀

ISSI's 64Mb Synchronous DRAM IS42/45S32200E is organized as 524,288 bits x 32-bit x 4-bank for improved performance. The synchronous DRAMs achieve high- speed data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input.