IS42S16400J-5TL

容量 64M
規格 4Mx16
電壓 3.3V
類型 SDR
刷新 4K
速度 5 = 200MHz
狀態 Prod
評注
腳位數 TSOP2(54), BGA(54), BGA(60)
產品系列 42 = SDR Commercial/Industrial grade
温度等级 blank = Commercial Grade (0°C to +70°C)
焊料類型 L = 100% matte Sn
字數 400 = 4M
Generation J = J
工作電壓範圍 S = 3.3V SDR
總線寬度 16 = x16
腳位/封裝 T = TSOP

IS42S16400J-5TL 特徵

  • Clock frequency: 200, 166, 143, 133 MHz
  • Fully synchronous; all signals referenced to a positive clock edge
  • Internal bank for hiding row access/precharge
  • Single 3.3V power supply
  • LVTTL interface
  • Programmable burst length
    • (1, 2, 4, 8, full page)
  • Programmable burst sequence: Sequential/Interleave
  • Self refresh modes
  • Auto refresh (CBR)
  • 4096 refresh cycles every 64 ms (Com, Ind, A1 grade) or 16ms (A2 grade)
  • Random column address every clock cycle
  • Programmable CAS latency (2, 3 clocks)
  • Burst read/write and burst read/single write operations capability
  • Burst termination by burst stop and precharge command OPTIONS
  • Package: 54-pin TSOP II 54-ball TF-BGA (8mm x 8mm) 60-ball TF-BGA (10.1mm x 6.4mm)

概觀

ISSI's 64Mb Synchronous DRAM is organized as 1,048,576 bits x 16-bit x 4-bank for improved performance. The synchronous DRAMs achieve high-speed data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input.

 

相關IC编號

IC 編號 庫存數量 可用數量 IC 編號 庫存數量 可用數量
IS42S16400J-5TL-TR 1,500 IS42S16400J-6TLI 5,000
IS42S16400J 1,000 IS42S16400J-6TLI-TR 6,000
IS42S16400J-5BL 34,800 IS42S16400J-7B2LI 5,361 286
IS42S16400J-5BL-TR 7,500 IS42S16400J-7B2LI-TR 25,000
IS42S16400J-5BLI 50,000 IS42S16400J-7BL 348
IS42S16400J-5BLI-TR IS42S16400J-7BL-TR 7,500
IS42S16400J-6BL 5,000 IS42S16400J-7BLI 8
IS42S16400J-6BL-TR 7,500 IS42S16400J-7BLI-TR 17,500
IS42S16400J-6BLI 1,623 IS42S16400J-7TL 1,000
IS42S16400J-6BLI-TR 2,500 IS42S16400J-7TL-TR 1,500
IS42S16400J-6TL 58 IS42S16400J-7TLI 1,000
IS42S16400J-6TL-TR 1,500 IS42S16400J-7TLI-TR 27,000