容量 16M
規格 1Mx16
類型 SDR
電壓 3.3V
刷新 2K
速度 5 = up to 200Mhz
腳位/封裝 T = TSOP
狀態 EOL
型號別 IBIS-TSOP
產品系列 42 = 商業/工業級SDRAM
總線寬度 16 = x16
字數 100 = 1M
代/版本 E
焊接 [空白] = SnPb
温規 [空白] = 商規 (0C to +70°C)

IS42S16100E-5T 特徵

  • Clock frequency: 200, 166, 143 MHz
  • Fully synchronous; all signals referenced to a positive clock edge
  • Two banks can be operated simultaneously and independently
  • Dual internal bank controlled by A11 (bank select)
  • Single 3.3V power supply
  • LVTTL interface
  • Programmable burst length
    • (1, 2, 4, 8, full page)
  • Programmable burst sequence: Sequential/Interleave
  • 2048 refresh cycles every 32ms (Com, Ind, A1 grade) or 16ms (A2 grade)
  • Random column address every clock cycle
  • Programmable CAS latency (2, 3 clocks)
  • Burst read/write and burst read/single write operations capability
  • Burst termination by burst stop and precharge command
  • Byte controlled by LDQM and UDQM
  • Packages: 400-mil 50-pin TSOP-II and 60-ball TF-BGA

概觀

ISSI’s 16Mb Synchronous DRAM IS42/4516100E is organized as a 524,288-word x 16-bit x 2-bank for improved performance. The synchronous DRAMs achieve high-speed data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input.