| 容量 | 128M |
|---|---|
| 規格 | 8Mx16 |
| 腳位/封裝 | BGA(60) |
| 電壓 | 1.8V |
| 刷新 | 4K |
| 字數 | 8M |
| 型號別 | IBIS |
| 焊接 | SnAgCu |
| 狀態 | EOL |
| 外包裝 | Tape on Reel |
| 類型 | MDDR |
| 總線寬度 | 16 = x16 |
| 速度（MHz） | 166 |
| 温規 | Automotive Grade (-40C to +85°C) |
| 代/版本 | F |
| 產品系列 | 46 = DDR/DDR2/DDR3/DDR4 Automotive grade |
| 温度等级 | A1 = Automotive Grade (-40°C to +85°C) |
| 焊料類型 | L = SnAgCu |
| 字數 | 800 = 8M |
| Generation | F = F |
| 速度 | 6 = 166MHz |
| 工作電壓範圍 | LR = 1.8V mobile DDR (LPDDR) |
| 腳位/封裝 | B = BGA |
The IS43/46LR16800F is 134,217,728 bits CMOS Mobile Double Data Rate Synchronous DRAM organized as 4 banks of 2,097,152 words x 16 bits. This product uses a double-data-rate architecture to achieve high-speed operation. The Data Input/ Output signals are transmitted on a 16-bit bus. The double data rate architecture is essentially a 2N prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pins. This product offers fully synchronous operations referenced to both rising and falling edges of the clock. The data paths are internally pipelined and 2n-bits prefetched to achieve very high bandwidth. All input and output voltage levels are compatible with LVCMOS.