規格 32Mx32
類型 MDDR
電壓 1.8V
刷新 8K
速度(MHz) 6 = up to 166Mhz
腳位/封裝 BGA(90)
狀態 Prod
型號別 IBIS, IBIS(46)
產品系列 43 = 商業/工業級DDR/DDR2/DDR3/DDR4
總線寬度 32 = x32
字數 320 = 32M
代/版本 B
焊接 L = SnAgCu
温規 [空白] = 商規 (0C to +70°C)

IS43LR32320B-6BL 特徵

  • JEDEC standard 1.8V power supply.
  • 64ms refresh period (8K cycle)
  • VDD = 1.8V, VDDQ = 1.8V
  • Auto & self refresh
  • Four internal banks for concurrent operation
  • Concurrent Auto Precharge
  • MRS cycle with address key programs
  • Maximum clock frequency up to 200MHZ
  • Maximum data rate up to 400Mbps/pin
  • Power Saving support - PASR (Partial Array Self Refresh) - Auto TCSR (Temperature Compensated Self Refresh) - Deep Power Down Mode - Programmable Driver Strength Control by Full Strength, or 3/4, 1/2, 1/4, 1/8 of Full Strength
  • - CAS latency 2, 3 (clock) - Burst length (2, 4, 8, 16) - Burst type (sequential & interleave)
  • Fully differential clock inputs (CK, /CK)
  • All inputs except data & DM are sampled at the rising edge of the system clock
  • Data I/O transaction on both edges of data strobe
  • Bidirectional data strobe per byte of data (DQS)
  • Status Register Read (SRR)
  • DM for write masking only
  • LVCMOS compatible inputs/outputs
  • Edge aligned data & data strobe output
  • 32mx32 (two stacked 8mx16x4 banks)
  • Center aligned data & data strobe input