IS43LR16160F-5BL-TR

容量	256M
規格	16Mx16
腳位/封裝	BGA(60)
電壓	1.8V
刷新	8K
字數	16M
型號別	IBIS
焊接	SnAgCu
狀態	EOL
外包裝	Tape on Reel
類型	MDDR
總線寬度	16 = x16
速度（MHz）	up to 200Mhz
温規	Commercial Grade (0C to +70°C)
代/版本	F
產品系列	43 = DDR/DDR2/DDR3/DDR4 Commercial/Industrial grade
温度等级	blank = Commercial Grade (0°C to +70°C)
焊料類型	L = SnAgCu
字數	160 = 16M
Generation	F = F
速度	5 = 200MHz
工作電壓範圍	LR = 1.8V mobile DDR (LPDDR)
腳位/封裝	B = BGA

IS43LR16160F-5BL-TR 特徵

JEDEC standard 1.8V power supply.
64ms refresh period (8K cycle)
VDD = 1.8V, VDDQ = 1.8V
Auto & self refresh
Four internal banks for concurrent operation
Concurrent Auto Precharge
MRS cycle with address key programs
Maximum clock frequency up to 200MHZ
- CAS latency 2, 3 (clock) - Burst length (2, 4, 8, 16) - Burst type (sequential & interleave)
Maximum data rate up to 400Mbps/pin
Power Saving support - PASR (Partial Array Self Refresh) - Auto TCSR (Temperature Compensated Self Refresh) - Deep Power Down Mode - Programmable Driver Strength Control by Full Strength or 3/4, 1/2, 1/4, or 1/8 of Full Strength
Fully differential clock inputs (CK, /CK)
All inputs except data & DM are sampled at the rising edge of the system clock
Data I/O transaction on both edges of data strobe
Bidirectional data strobe per byte of data (DQS)
Status Register Read (SRR)
DM for write masking only
LVCMOS compatible inputs/outputs
Edge aligned data & data strobe output
60-Ball FBGA package