容量 512M
類型 Multi I/O SPI, QPI, DTR
電壓 2.3-3.6V
频率 80M/166Mhz
温規 -40 to 125°C
腳位/封裝 SOIC, TFBGA
狀態 Prod
外包裝 卷轴包

IS25DLP512M-CMLE-TR 特徵

  • Industry Standard Serial Interface
  • Efficient Read and Program modes
  • - IS25DLP/DWP512M: 512Mbit/64Mbyte - Dual Die Stack of two IS25LP/WP256D - Supports standard SPI and QPI protocols - Double Transfer Rate (DTR) : SPI DTR, Dual I/O SPI DTR , and Quad I/O SPI DTR - Low Instruction Overhead Operations - QPI for reduced instruction overhead - Continuous Read 8/16/32/64-Byte Burst Wrap - Selectable burst length - Supports Serial Flash Discoverable
  • Low Power with Wide Temp. Parameters (SFDP)
  • - Support Hardware RESET# Feature
  • High Performance Serial Flash (SPI)
  • - 80MHz Normal Read - Up to166Mhz Fast Read: -166MHz at Vcc=2.7V to 3.6V -133MHz at Vcc=2.3V to 3.6V - Up to 80MHz DTR (Dual Transfer Rate) - Equivalent Throughput of 664 Mb/s - Selectable Dummy Cycles - Configurable Drive Strength - Supports SPI Modes 0 and 3 - More than 100,000 Erase/Program Cycles - More than 20-year Data Retention
  • Flexible & Efficient Memory Architecture
  • - Chip Erase with Uniform: Sector/Block Erase (4/32/64 Kbyte) - Program 1 to 256 bytes per page per die - Program/Erase Suspend & Resume Ranges - Single Voltage Supply IS25DLP: 2.30V to 3.60V IS25DWP: 1.65V to 1.95V - 10 mA Active Read Current per die - 8 µA Standby Current per die - 1 µA Deep Power Down per die - Temp Grades: Extended: -40°C to +105°C Extended+: -40°C to +125°C (Call Factory) Auto Grade: up to +125°C
  • Advanced Security Protection
  • - Software and Hardware Write Protection - Power Supply lock protect - 4x256-Byte dedicated security area per die with user-lockable bits, (OTP) One Time Programmable Memory - 128 bit Unique ID for each device (Call Factory)

概觀

This document contains for the IS25DLP/DWP512M device. The device is a dual die stack of two IS25LP/WP256D dies. For detailed specifications, please refer to the discrete die datasheet linked below.