IS46DR81280B-25DBLA1

容量	1G
規格	128Mx8
電壓	1.8V
類型	DDR2
刷新	8K
速度	25 = 400MHz
狀態	NR
評注
腳位數	BGA(60)
產品系列	46 = DDR/DDR2/DDR3/DDR4 Automotive grade
温度等级	A1 = Automotive Grade (-40°C to +85°C)
焊料類型	L = SnAgCu
字數	1280 = 128M
CL（CAS延遲）	D = 5
Generation	B = B
工作電壓範圍	DR = 1.8V DDR2
總線寬度	8 = x8
腳位/封裝	B = BGA

數據表

索取報價

IS46DR81280B-25DBLA1 特徵

Clock frequency up to 400MHz
8 internal banks for concurrent operation
4-bit prefetch architecture
Programmable CAS Latency: 3, 4, 5, 6 and 7
Programmable Additive Latency: 0, 1, 2, 3, 4, 5 and 6
Write Latency = Read Latency-1
Programmable Burst Sequence: Sequential or Interleave
Programmable Burst Length: 4 and 8
Automatic and Controlled Precharge Command
Power Down Mode
Auto Refresh and Self Refresh
Refresh Interval: 7.8 s (8192 cycles/64 ms)
ODT (On-Die Termination)
Weak Strength Data-Output Driver Option
Bidirectional differential Data Strobe (Single- ended data-strobe is an optional feature)
On-Chip DLL aligns DQ and DQs transitions with CK transitions
DQS# can be disabled for single-ended data strobe
Read Data Strobe supported (x8 only)
Differential clock inputs CK and CK#
VDD and VDDQ = 1.8V ± 0.1V
PASR (Partial Array Self Refresh)
SSTL_18 interface tRAS lockout supported
Operating temperature: Commercial (TA = 0°C to 70°C ; TC = 0°C to 85°C) Industrial (TA = -40°C to 85°C; TC = -40°C to 95°C) Automotive, A1 (TA = -40°C to 85°C; TC = -40°C to 95°C) Automotive, A2 (TA = -40°C to 105°C; TC = -40°C to 105°C) OPTIONS
Configuration:  128Mx8 (16M x 8 x 8 banks)  64Mx16 (8M x 16 x 8 banks)
Package:  60-ball TW-BGA for x8  84-ball TW-BGA for x16

概觀

Power-up and Initialization DDR2 SDRAMs must be powered up and initialized in a predefined manner. Operational procedures other than those specified may result in undefined operation.

IC 編號	可用數量	IC 編號	可用數量
IS46DR81280B-25DBLA1-TR	2,000	IS46DR81280B-3DBLA1-TR	5,000
IS46DR81280B-25DBLA2	1,210	IS46DR81280B-3DBLA2	242
IS46DR81280B-25DBLA2-TR	2,000	IS46DR81280B-3DBLA2-TR	2,000
IS46DR81280B-3DBLA1	5,000

IS46DR81280B-25DBLA1 特徵

概觀

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