規格 | 512Kx16 |
---|---|
電壓 | 1.7-1.95V/ 2.7-3.6V |
速度(ns) | 70 |
腳位/封裝 | TFBGA(48) |
狀態 | Prod |
評注 | Asynch/ Page |
產品系列 | 66 = Pseudo SRAM |
產品類別 | E = Asynch/Page PSRAM |
硅片版本 | E |
電壓 - 電源 | BLL = 3V |
焊接 | L = 無鉛 |
温規 | I = 工業級 (-40C to +85°C) |
外包裝 | 卷轴包 |
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IS66WVE51216EBLL-70BLI-TR 特徵
- Asynchronous and page mode interface
-
Dual voltage rails for optional performance
- ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95V
- BLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6V
- CLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V
-
Page mode read access
- Interpage Read access : 60ns, 70ns
- Intrapage Read access : 25ns
-
Low Power Consumption
- Asynchronous Operation < 30 mA
- Intrapage Read < 23 mA
- Standby < 150 uA (max.)
- Deep power-down (DPD)
- ALL/CLL: < 3µA (Typ)
- BLL: < 10µA (Typ)
-
Low Power Feature
- Temperature Controlled Refresh
- Partial Array Refresh
- Deep power-down (DPD) mode
- Operating temperature Range Industrial: -40°C~85°C Automotive A1: -40°C~85°C
概觀
The IS66/67WVE51216EALL/BLL/CLL and IS66/67WVE51216TALL/BLL/CLL are integrated memory device containing 8Mbit Pseudo Static Random Access Memory using a self-refresh DRAM array organized as 512K words by 16 bits. The device includes several power saving modes : Partial Array Refresh mode where data is retained in a portion of the array and Deep Power Down mode. Both these modes reduce standby current drain. The die has separate power rails, VDDQ and VSSQ for the I/O to be run from a separate power supply from the device core.