IS61LPS25618A-250TQ-TR - 日耀电子 | ISSI/蕊成授权代理

規格	256Kx18
腳位/封裝	TQFP
tKQ	2.6, 3.1
電壓	3.3V
VccQ	2.5/3.3V
焊接	SnPb
狀態	Prod
評注	P/SCD
外包裝	Tape on reel
速度（MHz）	250
温規	Commercial Grade (0C to +70°C)
產品系列	High Speed

數據表

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IS61LPS25618A-250TQ-TR 特徵

Internal self-timed write cycle
Individual Byte Write Control and Global Write
Clock controlled, registered address, data and control
Burst sequence control using MODE input
Three chip enable option for simple depth ex- pansion and address pipelining
Common data inputs and data outputs
Auto Power-down during deselect
Single cycle deselect
Snooze MODE for reduced-power standby
Power Supply LPS: Vdd 3.3V + 5%, Vddq 3.3V/2.5V + 5% VPS: Vdd 2.5V + 5%, Vddq 2.5V + 5%
JEDEC 100-Pin QFP, 119-ball and 165-ball BGA packages
Automotive temperature available

概觀

The ISSI IS61(64)LPS12832A, IS61(64)LPS/VP- S12836A and IS61(64)LPS/VPS25618A are high-speed, low-power synchronous static RAMs designed to provide burstable, high-performance memory for communication and networking applications. The IS61(64)LPS12832A is organized as 131,072 words by 32 bits. The IS61(64)LPS/ VPS12836A is organized as 131,072 words by 36 bits. The IS61(64)LPS/VPS25618A is organized as 262,144 words by 18 bits. Fabricated with ISSI's advanced CMOS technology, the device integrates a 2-bit burst counter, high-speed SRAM core, and high-drive capability outputs into a single monolithic circuit. All synchronous inputs pass through registers controlled by a positive-edge-triggered single clock input.