IS45S83200D-7TLA1-TR

容量 256M
規格 32Mx8
電壓 3.3V
類型 SDR
刷新 8K
速度 7 = 143MHz
狀態 Contact ISSI
評注
腳位數 TSOP2(54)
產品系列 45 = SDR Automotive grade
温度等级 A1 = Automotive Grade (-40°C to +85°C)
焊料類型 L = 100% matte Sn
字數 3200 = 32M
Generation D = D
工作電壓範圍 S = 3.3V SDR
總線寬度 8 = x8
腳位/封裝 T = TSOP
外包裝 Tape on Reel

IS45S83200D-7TLA1-TR 特徵

  • Clock frequency: 166, 143 MHz
  • Fully synchronous; all signals referenced to a positive clock edge
  • Internal bank for hiding row access/precharge
  • Single Power supply: 3.3V + 0.3V
  • LVTTL interface
  • Programmable burst length
    • (1, 2, 4, 8, full page)
  • Programmable burst sequence: Sequential/Interleave
  • Auto Refresh (CBR)
  • Self Refresh
  • 8K refresh cycles every 16 ms (A2 grade) or 64 ms (commercial, industrial, A1 grade)
  • Random column address every clock cycle
  • Programmable CAS latency (2, 3 clocks)
  • Burst read/write and burst read/single write operations capability
  • Burst termination by burst stop and precharge command OPTIONS
  • Package: 54-pin TSOP-II 54-ball BGA

概觀

ISSI's 256Mb Synchronous DRAM achieves high-speed data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input. The 256Mb SDRAM is organized as follows.

 

相關IC编號

IC 編號 庫存數量 可用數量 IC 編號 庫存數量 可用數量
IS45S83200D-7TLA1 IS45S83200D-7CTNA1-TR
IS45S83200D IS45S83200D-7CTNA2
IS45S83200D-6TLA1 IS45S83200D-7CTNA2-TR
IS45S83200D-6TLA1-TR IS45S83200D-7TLA2
IS45S83200D-7CTNA1 IS45S83200D-7TLA2-TR