1. 矽成
  2. 動態記憶體
  3. 同步動態隨機存取記憶體
  4. Preceding 3.3V Automotive
  5. 128M 4Mx32
  6. TSOP2(86), BGA(90)
  7. IS45S32400E

  IS45S32400E

數據表
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容量 128M
規格 4Mx32
電壓 3.3V
類型 SDR
刷新 4K
速度 166, 143
狀態 Contact ISSI
評注
腳位數 TSOP2(86), BGA(90)
產品系列 45 = SDR Automotive grade
字數 400 = 4M
工作電壓範圍 S = 3.3V SDR
總線寬度 32 = x32
數據表
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IS45S32400E 特徵

  • Clock frequency: 166, 143, 133 MHz
  • Fully synchronous; all signals referenced to a positive clock edge
  • Internal bank for hiding row access/precharge
  • Single Power supply: 3.3V + 0.3V
  • LVTTL interface
  • Programmable burst length
    • (1, 2, 4, 8, full page)
  • Programmable burst sequence: Sequential/Interleave
  • Auto Refresh (CBR)
  • Self Refresh
  • 4096 refresh cycles every 16ms (A2 grade) or 64 ms (Commercial, Industrial, A1 grade)
  • Random column address every clock cycle
  • Programmable CAS latency (2, 3 clocks)
  • Burst read/write and burst read/single write operations capability
  • Burst termination by burst stop and precharge command OPTIONS
  • Package: 86-pin TSOP-II 90-ball TF-BGA

概觀

ISSI's 128Mb Synchronous DRAM achieves high-speed data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input. The 128Mb SDRAM is organized in 1Meg x 32 bit x 4 Banks.

 

相關IC编號

IC 編號 庫存數量 可用數量 IC 編號 庫存數量 可用數量
IS45S32400E-6BLA1 6,359 IS45S32400E-7BLA1 75 6,076
IS45S32400E-6BLA1-TR 7,500 IS45S32400E-7BLA1-TR 6,583
IS45S32400E-6BLA2 77 IS45S32400E-7BLA2 32 6,994
IS45S32400E-6BLA2-TR IS45S32400E-7BLA2-TR 6,585
IS45S32400E-6TLA1 6,494 IS45S32400E-7TLA1 163 6,469
IS45S32400E-6TLA1-TR 6,013 IS45S32400E-7TLA1-TR 6,886
IS45S32400E-7BA1 240 IS45S32400E-7TLA2 6,262
IS45S32400E-7BA1-TR 2,500 IS45S32400E-7TLA2-TR 6,996