IS45S16100F-7CTLA1

容量	16M
規格	1Mx16
電壓	3.3V
類型	SDR
刷新	2K
速度	7 = 143MHz
狀態	Contact ISSI
評注
腳位數	TSOP2(50), BGA(60)
產品系列	45 = SDR Automotive grade
温度等级	A1 = Automotive Grade (-40°C to +85°C)
焊料類型	L = 100% matte Sn
字數	100 = 1M
CL（CAS延遲）	C = 4
Generation	F = F
工作電壓範圍	S = 3.3V SDR
總線寬度	16 = x16
腳位/封裝	T = TSOP

數據表

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IS45S16100F-7CTLA1 特徵

Clock frequency: IS42/45S16100F: 200, 166, 143 MHz IS42VS16100F: 133, 100 MHz JUNE 2012
Fully synchronous; all signals referenced to a positive clock edge
Two banks can be operated simultaneously and independently
Dual internal bank controlled by A11 (bank select)
Single power supply: IS42/45S16100F: Vdd/Vddq = 3.3V IS42VS16100F: Vdd/Vddq = 1.8V
LVTTL interface
Programmable burst length
- (1, 2, 4, 8, full page)
Programmable burst sequence: Sequential/Interleave
2048 refresh cycles every 32 ms
Random column address every clock cycle
Programmable CAS latency (2, 3 clocks)
Burst read/write and burst read/single write operations capability
Burst termination by burst stop and precharge command
Byte controlled by LDQM and UDQM
Packages 400-mil 50-pin TSOP-II and 60-ball BGA
Lead-free package option

概觀

ISSI’s 16Mb Synchronous DRAM IS42S16100F, IS45S16100F and IS42VS16100F are each organized as a 524,288-word x 16-bit x 2-bank for improved performance. The synchronous DRAMs achieve high- speed data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input.

IC 編號	IC 編號	庫存數量	可用數量
IS45S16100F-7CTLA1-TR	IS45S16100F-6TLA1-TR
IS45S16100F	IS45S16100F-7BLA1		286
IS45S16100F-6BLA1	IS45S16100F-7BLA1-TR		2,500
IS45S16100F-6BLA1-TR	IS45S16100F-7TLA1	5	5
IS45S16100F-6TLA1	IS45S16100F-7TLA1-TR		1,000

IS45S16100F-7CTLA1

IS45S16100F-7CTLA1 特徵

概觀

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