IS49RL18128-TR

IS49RL18128-TR 特徵

The 2Gb (DDP:Dual Die Package) RLDRAM 3 Options 2Gb: x18, x36 RLDRAM 3 Features ADVANCED INFORMATION uses ISSI’s 1Gb RLDRAM 3 die.
933 MHz DDR operation (1866 Mb/s/ball data rate)
Organization
128 Meg x 18, and 64 Meg x 36 common I/O 16 banks
- 1.2V center-terminated push/pull I/O 2.5V VEXT, 1.35V VDD, 1.2V VDDQ (optional 1.35V VDDQ for 1866 operation only). Reduced cycle time (tRC (MIN) = 8ns)
SDR addressing
Programmable READ/WRITE latency (RL/WL) and burst length
Data mask for WRITE commands
Fr
Clock cycle and tRC timing
- 1.07 ns and tRC (MIN) = 8ns (RL3-1866) for -107E
- 1.25ns and tRC (MIN) = 10ns (RL3-1600) for -125E
- 1.25ns and tRC (MIN) = 12ns (RL3-1600) for -125
On-die DLL generates CK edge-aligned data and x,
64ms refresh (128K refresh per 64ms)
40 Ω or 60 Ω matched impedance outputs
Integrated on-die termination (ODT)
Single or multibank writes
READ training register
Multiplexed and non-multiplexed addressing capa- Extended operating range (200
- 933 MHz) bilities
Mirror function
Output driver and ODT calibration
Post Package Repar - 1 row per half bank

IC 編號	庫存數量	可用數量
IS49RL18128

IC 編號

庫存數量

可用數量