IS62WV10248HBLL-45B2L

容量 8M
規格 1Mx8
電壓 1.65-3.6V
狀態 S=NOW
腳位數 TSOP2(44), BGA(48)
速度Ns 45, 55
評論上一篇
產品系列 62 = Low Power
Bit Org 8 = x8
Operating Voltage WV = Wide Voltage Range
包裝代碼 B2 = BGA
電壓範圍 BLL = 2.5V to 3.6V
温度等级 blank = Commercial Grade (0°C to +70°C)
焊料類型 L = Lead-free (ROHS Compliant)
字數 1024 = 1024K
Revision H = H
速度 45 = 45NS

IS62WV10248HBLL-45B2L 特徵

  • High-speed access time: 45ns, 55ns
  • CMOS low power operation
    • Operating Current: 25 mA (max.)
    • CMOS Standby Current: 3.2 uA (typ., 25°C)
  • TTL compatible interface levels
  • Single power supply
    • 1.65V-2.2V VDD (IS62/65WV10248HALL)
    • 2.2V-3.6V VDD (IS62/65WV10248HBLL)
  • Three state outputs

概觀

SRAM is one of random access memories. SRAM has three different modes supported. Each function is described below with Truth Table. STANDBY MODE Device enters standby mode when deselected (CS1# HIGH or CS2 LOW). The input and output pins (I/O0-7) are placed in a high impedance state. CMOS input in this mode will maximize saving power. WRITE MODE Write operation issues with Chip selected (CS1# LOW and CS2 HIGH) and Write Enable (WE#) input LOW. The input and output pins (I/O0-7) are in data input mode. Output buffers are closed during this time even if OE# is LOW. READ MODE Read operation issues with Chip selected (CS1# LOW and CS2 HIGH) and Write Enable (WE#) input HIGH. When OE# is LOW, output buffer turns on to make data output. Any input to I/O pins during READ mode is not permitted. In the READ mode, output buffers can be turned off by pulling OE# HIGH. In this mode, internal device operates as READ but I/Os are in a high impedance state. Since device is in READ mode, active current is used. TRUTH TABLE.

 

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