規格 4Mx16
電壓 1.7-1.95V/ 2.7-3.6V
速度(ns) 70
腳位/封裝 TFBGA(48)
狀態 Prod
評注 Asynch/ Page
產品系列 67 = 車規Pseudo SRAM
產品類別 E = Asynch/Page PSRAM
硅片版本 E
電壓 - 電源 BLL = 3V
焊接 L = 無鉛
温規 A1 = 車規 (-40C to +85°C)

IS67WVE4M16EBLL-70BLA1 特徵

  • Asynchronous and page mode interface
  • Dual voltage rails for optional performance
    • ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95V
    • BLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6V
    • CLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V
  • Page mode read access
    • Interpage Read access : 60ns, 70ns
    • Intrapage Read access : 25ns
  • Low Power Consumption
    • Asynchronous Operation < 30 mA
    • Intrapage Read < 23mA
    • Standby < 200 uA (max.)
    • Deep power-down (DPD)
    • ALL/CLL: < 3µA (Typ)
    • BLL: < 10µA (Typ)
  • Low Power Feature
    • Temperature Controlled Refresh
    • Partial Array Refresh
    • Deep power-down (DPD) mode
  • Operating temperature Range Industrial: -40°C~85°C Automotive A1: -40°C~85°C

概觀

The IS66/67WVE4M16EALL/BLL/CLL and IS66/67WVE4M16TALL/BLL/CLL integrated memory device containing 64Mbit Pseudo Static Random Access Memory using a self-refresh DRAM array organized as 4M words by 16 bits. The device includes several power saving modes : Partial Array Refresh mode where data is retained in a portion of the array and Deep Power Down mode. Both these modes reduce standby current drain. The die has separate power rails, VDDQ and VSSQ for the I/O to be run from a separate power supply from the device core.