Vin(V) | 2.2-5.5 |
---|---|
Solder | SnPb |
Status | Prod |
Outpack | Tape on Reel |
Pkg Pin(mm) | TSSOP-24 |
Temp.Range | Commercial Grade (0C to +70°C) |
No. Channels | 19 Cap Touch input through shared GPIO |
Type | 5110 |
Sensor Type | Capacitive Touch |
Product Type | SE = Sensor |
Product Family | 31 = Commercial/Industrial Analog |
Part Number | 5110 = 5110 |
Package option | blank = Tray or Tube |
IS31SE5110 is a general-purpose micro-controller with 32K embedded flash memory and 1K SRAM. The CPU is based on 1-T 8051 with T0/T1/T2 and additional 16-bit T3/T4, 24-bit T5 and a 30-bit WDT. Embedded in the CPU core are also a full-duplex UART port, an enhanced EUART port with LIN capability, one I2C master/slave and two I2C pure slave controllers, one SPI mater/slave controller, up to 20 GPIO pins with each GPIO pin configurable as external interrupt and wake up. The flexibility in clock setting includes an on-chip 16MHz precision oscillator with the accuracy deviation of +/-2%, or a low power internal 32kHz oscillator. The clock selections are combined with flexible power management schemes, including NORMAL, PMM, IDLE, and STOP, and SLEEP modes to balance CPU speed and power consumption. A Programmable Counter Array (PCA) with 6 channels of Capture/Compare/PWM modules can be used for various purposes controlling external devices. There are additional 2 independent 8-bit PWM and a buzzer waveform generator with frequency range of 128Hz to 2048Hz and programmable duty cycle. Other digital peripherals include a EUART2 with 16- byte FIFO, which support full LIN protocols, and an I2C slave controller, and a SPI Master/Slave controller with 4-byte FIFO. Analog peripherals include a high performance 12- bit Analog to Digital Converter (ADC) with 30µs conversion time and a Programmable Gain Amplifier as ADC front-end. There are an on-chip temperature sensor, and a calibrated voltage reference within the ADC block. A 10-bit voltage output Digital to Analog Converter (DAC) is also included. IS31SE5110 also provides a flexible means of flash programming that supports ISP and IAP. The protection of data loss is implemented in hardware by access restriction of critical storage segments. The code security is reinforced with sophisticated writer commands and ISP commands. The on-chip break point processor also allows easy debugging which can be integrated with ISP. Reliable power- on-reset circuit and low supply voltage detection allows reliable operations under harsh environments. APPLICATIONS , White goods , Home appliance.