IS45S32400F-6TLA1

Density	128M
Org	4Mx32
Vcc	3.3V
Type	SDR
Refresh	4K
Speed	6 = 166MHz
Status	Prod
Comment
Pkg Pins	TSOP2(86), BGA(90)
Product Family	45 = SDR Automotive grade
Temp. Grade	A1 = Automotive Grade (-40°C to +85°C)
Solder Type	L = 100% matte Sn
Number Of Words	400 = 4M
Generation	F = F
Operating Voltage Range	S = 3.3V SDR
Bus Width	32 = x32
Package Type	T = TSOP

Datasheet

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IS45S32400F-6TLA1 Features

Clock frequency: 166, 143, 133 MHz
Fully synchronous; all signals referenced to a positive clock edge
Internal bank for hiding row access/precharge
Single Power supply: 3.3V + 0.3V
LVTTL interface
Programmable burst length
- (1, 2, 4, 8, full page)
Programmable burst sequence: Sequential/Interleave
Auto Refresh (CBR)
Self Refresh
4096 refresh cycles every 16ms (A2 grade) or 64 ms (Commercial, Industrial, A1 grade)
Random column address every clock cycle
Programmable CAS latency (2, 3 clocks)
Burst read/write and burst read/single write operations capability
Burst termination by burst stop and precharge command OPTIONS
Package: 86-pin TSOP-II 90-ball TF-BGA

Overview

ISSI's 128Mb Synchronous DRAM achieves high-speed data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input. The 128Mb SDRAM is organized in 1Meg x 32 bit x 4 Banks.

Related Part Number(s)

Description	Available Qty	Description	Available Qty
IS45S32400F-6TLA1-TR		IS45S32400F-7BA1-TR
IS45S32400F		IS45S32400F-7BLA1	6,955
IS45S32400F-6BLA1	5,000	IS45S32400F-7BLA1-TR	7,500
IS45S32400F-6BLA1-TR	7,500	IS45S32400F-7BLA2	225
IS45S32400F-6BLA2	1,440	IS45S32400F-7BLA2-TR	5,000
IS45S32400F-6BLA2-TR	7,500	IS45S32400F-7TLA1	65
IS45S32400F-6TLA2	1,000	IS45S32400F-7TLA1-TR	6,500
IS45S32400F-6TLA2-TR	6,500	IS45S32400F-7TLA2	8,433
IS45S32400F-7BA1	140	IS45S32400F-7TLA2-TR	6,500