IS45S16800J-7CTLA1

Org	16Mx8
Pkg(Pins)	TSOP2(54)
Vcc	3.3V
Refresh	4K
Speed	7 = 143MHz
No. of Words	8M
Solder	100% matte Sn
Status	S=Q3/17
Type	SDR
Bus Width	16 = x16
Temp.Range	Automotive Grade (-40C to +85°C)
CL (CAS Latency)	C = 4
Generation/Rev	J
Product Family	45 = SDR Automotive grade
Temp. Grade	A1 = Automotive Grade (-40°C to +85°C)
Solder Type	L = 100% matte Sn
Number Of Words	800 = 8M
Generation	J = J
Operating Voltage Range	S = 3.3V SDR
Package Type	T = TSOP

Datasheet

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IS45S16800J-7CTLA1 Features

Clock frequency: 166, 143 MHz
Internal bank for hiding row access/precharge
Power supply IS42/45S81600J IS42/45S16800J Vdd Vddq 3.3V 3.3V 3.3V 3.3V
LVTTL interface
Programmable burst length
- (1, 2, 4, 8, full page)
Programmable burst sequence: Sequential/Interleave
Auto Refresh (CBR)
Self Refresh
4096 refresh cycles every 16 ms (A2 grade) or 64 ms (Commercial, Industrial, A1 grade)
Random column address every clock cycle
Programmable CAS latency (2, 3 clocks)
Burst read/write and burst read/single write operations capability
Burst termination by burst stop and precharge command

Overview

ISSI's 128Mb Synchronous DRAM achieves high-speed data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input. The 128Mb SDRAM is organized as follows.