Buy
|
|
Density
|
2.30Gb
|
Org
|
128Mx18
|
Status
|
Contact ISSI
|
Comment
|
Dual Rank
|
Interface
|
Common I/O
|
Pkg Pins
|
BGA(168)
|
Cycle Time Trc
|
8, 10
|
Data Rates Mbps
|
1866, 1600
|
Product Family
|
49RL = RLDRAM 3
|
Configuration
|
18128 = 128M x 18
|
I/O Type
|
blank = RLDRAM 3
|
IS49RL18128
Features
-
The 2Gb (DDP:Dual Die Package) RLDRAM 3
Options
2Gb: x18, x36 RLDRAM 3
Features
ADVANCED INFORMATION
uses ISSI’s 1Gb RLDRAM 3 die.
-
933 MHz DDR operation (1866 Mb/s/ball data rate)
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Organization
-
128 Meg x 18, and 64 Meg x 36 common I/O
16 banks
-
-
-
1.2V center-terminated push/pull I/O
2.5V VEXT, 1.35V VDD, 1.2V VDDQ (optional 1.35V VDDQ
for 1866 operation only).
Reduced cycle time (tRC (MIN) = 8ns)
-
SDR addressing
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Programmable READ/WRITE latency (RL/WL) and
burst length
-
Data mask for WRITE commands
-
Fr
-
Clock cycle and
tRC timing
-
- 1.07 ns and tRC (MIN) = 8ns (RL3-1866) for -107E
- 1.25ns and tRC (MIN) = 10ns (RL3-1600) for -125E
- 1.25ns and tRC (MIN) = 12ns (RL3-1600) for -125
-
On-die DLL generates CK edge-aligned data and
x,
-
64ms refresh (128K refresh per 64ms)
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40 Ω or 60 Ω matched impedance outputs
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Integrated on-die termination (ODT)
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Single or multibank writes
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READ training register
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Multiplexed and non-multiplexed addressing capa-
Extended operating range (200
-
Mirror function
-
Output driver and ODT calibration
-
Post Package Repar - 1 row per half bank