Density | 36M |
---|---|
Org | 1Mx36 |
Burst | 2 |
Status | Prod |
Speed Mhz | 250, 300, 333, 400 |
Comments Previous Revision | |
Configuration | 1M36 = 1M x36 |
Speed | 333 = 333MHz |
Product Family | 61 = QUAD/P DDR-2/P |
Package Code | M3 = 165-ball BGA (15 x 17 mm) |
ROHS Version | L = Lead-free |
Burst Type | B2 = Burst 2 |
Die Rev | C = C |
Read Latency (RL) | blank = 1.5 clock cycles or 2.5 clock cycles |
Product Type | QD = QUAD |
ODT Option | blank = No ODT |
Temperature Range | I = Industrial (-40°C to +85°C) |
The Mb synchronous, high-performance CMOS static random access memory (SRAM) devices. These SRAMs have separate I/Os, eliminating the need for high-speed bus turnaround. The rising edge of K clock initiates the read/write operation, and all internal operations are self-timed. Refer to the.