| Org | 4Mx32 |
|---|---|
| Pkg(Pins) | BGA(90) |
| Vcc | 1.8V |
| Refresh | 4K |
| No. of Words | 4M |
| Models | IBIS |
| Solder | SnAgCu |
| Status | EOL |
| Outpack | Tape on Reel |
| Type | MDDR |
| Bus Width | 32 = x32 |
| Speed(Mhz) | 166 |
| Temp.Range | Automotive Grade (-40C to +105°C) |
| Generation/Rev | F |
| Product Family | 46 = DDR/DDR2/DDR3/DDR4 Automotive grade |
| Temp. Grade | A2 = Automotive Grade (-40°C to +105°C) |
| Solder Type | L = SnAgCu |
| Number Of Words | 400 = 4M |
| Generation | F = F |
| Speed | 6 = 166MHz |
| Operating Voltage Range | LR = 1.8V mobile DDR (LPDDR) |
| Package Type | B = BGA |
The IS43/46LR32400F is 134,217,728 bits CMOS Mobile Double Data Rate Synchronous DRAM organized as 4 banks of 1,048,576 words x 32 bits. This product uses a double-data-rate architecture to achieve high-speed operation. The Data Input/ Output signals are transmitted on a 32-bit bus. The double data rate architecture is essentially a 2N prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pins. This product offers fully synchronous operations referenced to both rising and falling edges of the clock. The data paths are internally pipelined and 2n-bits prefetched to achieve very high bandwidth. All input and output voltage levels are compatible with LVCMOS.