IS43LR32800F-5BL

Org	8Mx32
Pkg(Pins)	BGA(90)
Vcc	1.8V
Refresh	4K
No. of Words	8M
Models	IBIS, IBIS(46)
Solder	SnAgCu
Status	EOL
Type	MDDR
Bus Width	32 = x32
Speed(Mhz)	up to 200Mhz
Temp.Range	Commercial Grade (0C to +70°C)
Generation/Rev	F
Product Family	43 = DDR/DDR2/DDR3/DDR4 Commercial/Industrial grade
Temp. Grade	blank = Commercial Grade (0°C to +70°C)
Solder Type	L = SnAgCu
Number Of Words	800 = 8M
Generation	F = F
Speed	5 = 200MHz
Operating Voltage Range	LR = 1.8V mobile DDR (LPDDR)
Package Type	B = BGA

IS43LR32800F-5BL Features

JEDEC standard 1.8V power supply.
64ms refresh period (4K cycle)
VDD = 1.8V, VDDQ = 1.8V
Auto & self refresh
Four internal banks for concurrent operation
Concurrent Auto Precharge
MRS cycle with address key programs
Maximum clock frequency up to 200MHZ
Maximum data rate up to 400Mbps/pin
Power Saving support - PASR (Partial Array Self Refresh) - Auto TCSR (Temperature Compensated Self Refresh) - Deep Power Down Mode - Programmable Driver Strength Control by Full Strength, or 3/4, 1/2, 1/4, 1/8 of Full Strength
- CAS latency 2, 3 (clock) - Burst length (2, 4, 8, 16) - Burst type (sequential & interleave)
Fully differential clock inputs (CK, /CK)
All inputs except data & DM are sampled at the rising edge of the system clock
Data I/O transaction on both edges of data strobe
Bidirectional data strobe per byte of data (DQS)
Status Register Read (SRR)
DM for write masking only
LVCMOS compatible inputs/outputs
Edge aligned data & data strobe output
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