Overview
The IS43/46LQ32256A and IS43/46LQ32256AL are
8Gbit CMOS LPDDR4 SDRAM. The device is orga-
nized as 2 channels per device, and individual channel
is 8-banks and 16-bits. This product uses a double-da-
ta-rate architecture to achieve high-speed operation.
The double data rate architecture is essentially a 16N
prefetch architecture with an interface designed to
transfer two data words per clock cycle at the I/O pins.
This product offers fully synchronous operations
referenced to both rising and falling edges of the clock.
The data paths are internally pipelined and 16n bits
prefetched to achieve very high bandwidth.