Density | 512M |
---|---|
Vcc | 2.3-3.6V |
Type | Multi I/O SPI, QPI, DTR |
Status | Prod |
Comment | |
Frequency | 80M/166Mhz |
Temp Range | -40 to 125°C |
Package Type | SOIC, TFBGA |
Product Family | 25 = Twin SPI Flash |
Revision | = First Generation |
Vdd(V) | DLP = 2.3V-3.6V |
Density Configuration | 512M = 512M |
This document contains for the IS25DLP/DWP512M device. The device is a dual die stack of two IS25LP/WP256D dies. For detailed specifications, please refer to the discrete die datasheet linked below.
Description | Stock Qty | Available Qty | Description | Stock Qty | Available Qty |
---|---|---|---|---|---|
IS25DLP512M-CMLA2 | IS25DLP512M-CMLA3-TR | ||||
IS25DLP512M-CMLA2-TR | IS25DLP512M-CMLE | ||||
IS25DLP512M-CMLA3 | IS25DLP512M-CMLE-TR |