IS43QR85120A-093PBL-TR
Features
-
Standard Voltage: VDD = VDDQ = 1.2V, VPP=2.5V
-
Signal Integrity
-
High speed data transfer rates with system frequency
-
- Internal VREFDQ Training
up to 2666 Mbps
-
Data Integrity
-
- Auto Self Refresh (ASR) by DRAM built-in TS
- Read Preamble Training
- Gear Down Mode
- Per DRAM Adressability
- Auto Refresh and Self Refresh Modes
- Configurable DS for system compatibility
-
DRAM access bandwidth
-
- Configurable On-Die Termination
- Separated IO gating structures by Bank Groups
- Data bus Inversion (DBI)
- Self Refresh Abort
- Fine Granularity Refresh
-
Signal Synchronization
-
- Write Leveling via MR settings
- Read Leveling via MPR
-
Reliability & Error Handling
-
- Command/Address Parity
- Data bus Write CRC
- MPR readout
- Boundary Scan (x16)
-
Speed Grade (CL-TRCD-TRP)
-
- 2133Mbps / 15-15-15 (-093P)
- 2400Mbps / 16-16-16 (-083R)
- 2666Mbps / 18-18-18 (-075U)
- ZQ Calibration for DS/ODT impedance accuracy via external
ZQ pad (240 ohm +/- 1%)
-
Power Saving and efficiency
-
- POD with VDDQ termination
- Command/Address Latency (CAL)
- Maximum Power Saving
- Low power Auto Self Refresh (LPASR)
-
Operating Temperature
-
- Commercial ( Tc = 0 oC to + 95 oC)
- Industrial ( Tc = -40 oC to + 95oC)
- Automotive A1 ( Tc = -40 oC to + 95 oC)
- Automotive A2 ( Tc = -40 oC to + 105 oC)
PPROGRAMMABLE FUNCTIONS
ADDRESS TABLE
-
Output Driver Impedance (34/48)
-
CAS Write Latency (9/0/11/12/14/16/18)
-
Additive Latency (0/CL-1/CL-2)
-
CS# to Command Address (3/4/5/6/8)
-
Burst Type (Sequential/Interleaved)
-
Write Recovery Time (10/12/14/16/18/20/24)
-
Read Preamble (1T/2T)
-
Write Preamble (1T/2T)
-
Burst Length (BL8/BC4/BC4 or 8 on the fly)
Options
-
Configuration: 512Mx8, 256Mx16