IS43QR16256B-075UBL
Features
-
Standard Voltage : VDD = VDDQ = 1.2V, VPP=2.5V
-
High speed data transfer rates with system frequency
up to 2666 Mbps
-
Data Integrity
-
- Auto Self Refresh (ASR) by DRAM built-in TS
- Auto Refresh and Self Refresh Modes
-
DRAM access bandwidth
-
- Separated IO gating structures by Bank Groups
- Self Refresh Abort
- Fine Granularity Refresh
-
Signal Synchronization
-
- Write Leveling via MR settings
- Read Leveling via MPR
-
Reliability & Error Handling
-
- Command/Address Parity
- Data bus Write CRC
- MPR readout
- Boundary Scan (x16 only)
-
Speed Grade (CL-TRCD-TRP)
-
- 2400Mbps
/ 16-16-16 (-083R)
- 2666Mbps/ 18-18-18 (-075U)
PROGRAMMABLE FUNCTIONS
-
Output Driver Impedance (34/48)
-
CAS Write Latency (9/10/11/12/14/16/18)
-
Additive Latency (0/CL-1/CL-2) (x8 only)
-
CS# to Command Address (3/4/5/6/8)
-
Burst Type (Sequential/Interleaved)
-
Write Recovery Time (10/12/14/16/18/20/24)
-
Read Preamble (1T/2T)
-
Write Preamble (1T/2T)
-
Burst Length (BL8/BC4/BC4 or 8 on the fly)
Options
-
Configuration : 256Mx16, 512Mx8
-
Package:
-
- 96-ball BGA (7.5mm x 13.5mm, 0.8mm ball pitch) for x16
- 78-ball BGA (10.0mm x 14.0mm, 0.8mm ball pitch) for x8
-
Signal Integrity
-
- Internal VREFDQ Training
- Read Preamble Training
- Gear Down Mode
- Per DRAM Adressability
- Configurable DS for system compatibility
- Configurable On-Die Termination
- Data bus Inversion (DBI)
- ZQ Calibration for DS/ODT impedance accuracy via external
ZQ pad (240 ohm +/- 1%)
-
Power Saving and efficiency
-
- POD with VDDQ termination
- Command/Address Latency (CAL)
- Maximum Power Saving
- Low power Auto Self Refresh (LPASR)