| Density | 4M |
|---|---|
| Org | 512Kx8 |
| Vcc | 1.65-3.6V |
| Status | S=NOW |
| Pkg Pins | sTSOP1(32), TSOP1/2(32), BGA(36) |
| Speed Ns | 45, 55 |
| Comment Previous Rev | ECC based SRAM |
SRAM is one of random access memories. SRAM has three different modes supported. Each function is described below with Truth Table. STANDBY MODE Device enters standby mode when deselected (CS# HIGH). The input and output pins (I/O0-7) are placed in a high impedance state. CMOS input in this mode will maximize saving power. WRITE MODE Write operation issues with Chip selected (CS# LOW) and Write Enable (WE#) input LOW. The input and output pins (I/O0-7) are in data input mode. Output buffers are closed during this time even if OE# is LOW.