| Density | 8M |
|---|---|
| Org | 1Mx8 |
| Vcc | 1.65-3.6V |
| Status | S=NOW |
| Pkg Pins | TSOP2(44), BGA(48) |
| Speed Ns | 45, 55 |
| Comment Previous Rev | |
| Product Family | 62 = Low Power |
| Bit Org | 8 = x8 |
| Operating Voltage | WV = Wide Voltage Range |
| Package Code | B2 = BGA |
| Voltage Range | BLL = 2.5V to 3.6V |
| Temp. Grade | blank = Commercial Grade (0°C to +70°C) |
| Solder Type | blank = SnPb |
| Number Of Words | 1024 = 1024K |
| Revision | H = H |
| Speed | 45 = 45NS |
SRAM is one of random access memories. SRAM has three different modes supported. Each function is described below with Truth Table. STANDBY MODE Device enters standby mode when deselected (CS1# HIGH or CS2 LOW). The input and output pins (I/O0-7) are placed in a high impedance state. CMOS input in this mode will maximize saving power. WRITE MODE Write operation issues with Chip selected (CS1# LOW and CS2 HIGH) and Write Enable (WE#) input LOW. The input and output pins (I/O0-7) are in data input mode. Output buffers are closed during this time even if OE# is LOW. READ MODE Read operation issues with Chip selected (CS1# LOW and CS2 HIGH) and Write Enable (WE#) input HIGH. When OE# is LOW, output buffer turns on to make data output. Any input to I/O pins during READ mode is not permitted. In the READ mode, output buffers can be turned off by pulling OE# HIGH. In this mode, internal device operates as READ but I/Os are in a high impedance state. Since device is in READ mode, active current is used. TRUTH TABLE.