IS61WV102416FBLL-10BLI-TR

Density 16M
Org 1Mx16
Vcc 1.65~3.6
Status S=NOW
Pkg Pins TSOP1(48), TSOP2(54), BGA(48)
Speed Ns 8, 10, 20
Comment Previous Rev
Voltage Range BLL = 2.5V to 3.6V
Temp. Grade I = Industrial Grade (-40°C to +85°C)
Solder Type L = Lead-free (ROHS Compliant)
Revision F = F
Number Of Words 1024 = 1024K
Speed 10 = 10NS
Bit Org 16 = x16
Product Family 61 = High Speed
Operating Voltage WV = Wide Voltage Range
Package Code B = BGA
Outpack Tape on Reel

IS61WV102416FBLL-10BLI-TR Features

  • High-speed access time: 8ns, 10ns, 20ns
  • High- performance, low power CMOS process
  • Multiple center power and ground pins for greater noise immunity
  • TTL compatible inputs and outputs
  • Single power supply
    • 1.65V-2.2V VDD (IS61WV102416FALL)
    • 2.4V-3.6V VDD (IS61/64WV102416FBLL)
  • Packages available :
  • - 48 ball mini BGA (6mm x 8mm) - 48 pin TSOP (Type I) - 54 pin TSOP (Type II) Industrial and Automotive temperature support
  • Lead-free available

Overview

SRAM is one of random access memories. Each byte or word has an address and can be accessed randomly. SRAM has three different modes supported. Each function is described below with Truth Table. STANDBY MODE Device enters standby mode when deselected (CS# HIGH). The input and output pins (I/O0-15) are placed in a high impedance state. CMOS input in this mode will maximize saving power. WRITE MODE Write operation issues with Chip selected (CS#) and Write Enable (WE#) input LOW. The input and output pins (I/O0- 15) are in data input mode. Output buffers are closed during this time even if OE# is LOW. UB# and LB# enables a byte write feature. By enabling LB# LOW, data from I/O pins (I/O0 through I/O7) are written into the location specified on the address pins. And with UB# being LOW, data from I/O pins (I/O8 through I/O15) are written into the location. READ MODE Read operation issues with Chip selected (CS# LOW) and Write Enable (WE#) input HIGH. When OE# is LOW, output buffer turns on to make data output. Any input to I/O pins during READ mode is not permitted. UB# and LB# enables a byte read feature. By enabling LB# LOW, data from memory appears on I/O0-7. And with UB# being LOW, data from memory appears on I/O8-15. In the READ mode, output buffers can be turned off by pulling OE# HIGH. In this mode, internal device operates as READ but I/Os are in a high impedance state. Since device is in READ mode, active current is used. TRUTH TABLE.

 

Related Part Number(s)

Description Stock Qty Available Qty Description Stock Qty Available Qty
IS61WV102416FBLL-10BLI 10,000 IS61WV102416FBLL-10BI-TR
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IS61WV102416FBLL-10B2LI-TR IS61WV102416FBLL-8BLI-TR
IS61WV102416FBLL-10B3LI IS61WV102416FBLL-8T2LI
IS61WV102416FBLL-10B3LI-TR IS61WV102416FBLL-8T2LI-TR
IS61WV102416FBLL-10B4LI IS61WV102416FBLL-8TLI
IS61WV102416FBLL-10B4LI-TR IS61WV102416FBLL-8TLI-TR
IS61WV102416FBLL-10BI